The present invention relates to a non-volatile semiconductor memory device with a data latch that stores both read data and write data.
Non-volatile read/write memory devices such as flash memory devices employ two methods, hot-electron injection and Fowler-Nordheim tunneling, to store and erase data in their memory cells. Fowler-Nordheim tunneling is the slower method, taking a few hundred to a few thousand microseconds to write data that could be written in a few tens of microseconds by hot-electron injection. Nevertheless, for low-power memory devices, Fowler-Nordheim tunneling is an attractive data-writing method because it draws very little current, enabling the necessary writing voltages to be generated within the memory device.
The slowness of Fowler-Nordheim tunneling write operations can be hidden by providing each bit line in the memory device with a latch for holding write data. When write data have been stored in all of the latches, one word line is activated, and the data are written all at once into the memory cells coupled to the word line. To an external device sending write data to the memory device, the write cycle time becomes the time needed to store the data in the write latches, which is the same regardless of the method employed to write the data into the memory cells.
In flash memory devices specialized for serial access, including flash memory devices used in digital still cameras and flash memory modules used as replacements for rotating-disk storage devices, to simplify the memory circuit, the same latches are often made to function as sense amplifiers in data read operations. Read data from all memory cells coupled to a designated word line are sensed and amplified simultaneously by the latches. After sense amplification, the latches become a cache from which the read data can be accessed quickly, without further sense amplification, in a manner similar to fast page mode read access in a dynamic random-access memory (DRAM).
It would be convenient if write data held in the latches could also be read in this way while awaiting transfer to the memory cells. This is particularly desirable in memory devices that write data by Fowler-Nordheim tunneling and therefore require lengthy residence of write data in the data latches. When Fowler-Nordheim tunneling is used for writing with common flash memory architectures such as the NOR architecture and the AND architecture, however, the polarity of write data stored in the latches is opposite to the polarity of read data, so the write data cannot be read correctly.
Conventional flash memories that attempt to implement a DRAM-like external interface therefore require both sense amplifiers for amplifying and caching read data, and separate latches for caching write data, with resultant penalties in device size and cost. Conversely, conventional flash memories that use sense amplifiers as write data latches cannot provide read access to write data stored in the latches; read access must wait until the data have actually been stored in the memory cells. With Fowler-Nordheim tunneling in particular, the wait may be long.